不同CPU指令集添加编译选项

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不同CPU指令集添加编译选项

2015-4-8 21:45:05 | Compiler | 没有评论

今天在处理程序在不同CPU架构,不同的指令集上编译的运行问题,其实没跨平台,算不上交叉编译,但需要将gcc按照不同cpu指令集在编译过程中提供给gcc选项,基本内容可以从gcc的man page里查找,下面是man里根据SSE4.2为标准的部分内容

core2
       Intel Core 2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3 instruction set support.

nehalem
       Intel Nehalem CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and POPCNT instruction set support.

westmere
       Intel Westmere CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES and PCLMUL instruction set support.

sandybridge
       Intel Sandy Bridge CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AVX, AES and PCLMUL instruction set support.

ivybridge
       Intel Ivy Bridge CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AVX, AES, PCLMUL, FSGSBASE, RDRND and F16C instruction set support.

haswell
       Intel Haswell CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA, BMI, BMI2 and F16C instruction set support.

broadwell
       Intel Broadwell CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA, BMI, BMI2, F16C, RDSEED, ADCX and PREFETCHW instruction set support.

bonnell
       Intel Bonnell CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3 and SSSE3 instruction set support.

Linux下通过下面命令查找体系架构:

dmesg | grep 'Performance Events' | awk '{print $5}'

但是Atom服务器试过了,并不打印出Atom,这点很奇怪,不清楚是不是机器问题

假如想在Makefile里指定,可以如下进行

ARCH=Westmere
ifeq ($(strip $(ARCH)), Westmere)
  MARCH := corei7
  MTUNE := corei7
endif

ifeq ($(strip $(ARCH)), SandyBridge)
  MARCH := corei7-avx
  MTUNE := corei7-avx
endif

......中间省略可自行添加......

CFLAGS += -march=$(MARCH) -mtune=$(MTUNE)

,

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